The Art of Digital Design Using FPGAs

Course 296

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FPGAs (Field-Programmable Gate Arrays) are dynamic semiconductor devices offering unparalleled flexibility for customizing digital circuits, catering to diverse applications. This 5-day course addresses the challenges associated with efficiently utilizing FPGAs, specifically navigating the intricate design flow from RTL to a functional bitstream. The primary goal is to demystify this process, providing an in-depth understanding of each design step's impact on performance metrics. Participants will delve into FPGA fabric components and learn to leverage them effectively based on design requirements.

The course emphasizes fundamental elements in the design process, covering HDL modeling, event-driven simulation, synthesis, timing analysis, physical design, and testing planning. Throughout the training, attendees explore the nuances of these elements when using FPGA platforms, with a focus on Xilinx's VIVADO for the entire FPGA flow. Practical hands-on experience is facilitated through a demonstration project developed progressively by participants.

By the end of the course, participants will have gained comprehensive insights into FPGA digital design flows, reinforced by practical experience using industry-standard tools. The aim is to empower attendees to confidently navigate FPGA design complexities and make informed decisions in accordance with their project needs.

Learning objectives

Upon completing the course you will be able to:

“Holistically Understand” digital design flow (from the specification phase to the testing phase). - Learn all transformations that occur during the design flow and analyze their effect on performance metrics. - Understand the details of FPGAs internal fabric. - Gain knowledge on Front-End and Back-End design concepts in FPGAs. - Understand timing-analysis and timing-closure in different design phases. - Understand system level planning (Power Distribution Network, IO, Global Signals, etc). - Design “Real” digital blocks starting from RTL and taking them to FPGA Bitstream. - Hands-on practice on FPGA programming and testing.


Day 1: Module-I: Fundamentals:

Digital IC design: Introduction, Evolution and Future.
Architecture of digital circuits (data path, control path, synchronization, data encoding).
Digital System Design (Microprocessors, FPGA, ASIC).
Fundamentals of digital design (HDL modeling, synthesis , timing analysis and timing closure, physical design, chip planning, testing).

Day 2 & 3: Module-II: FPGA based design:

What is a FPGA?
FPGA fabric architectures.
HDL modeling and Synthesis for FPGA.
Physical design (floorplanning, power planning, Clock Tree Synthesis (CTS), and timing closure).
Preparing for chip testing, Dos and Don'ts.
FPGA types and applications (eFPGAs, Hardware acceleration, ASIC prototyping, etc.).

Day 4 & 5: Module-III: Hands-on Practice:

Design different digital blocks on FPGA, with a final project.
The use of special logic blocks (DSPs, BRAMS, Embedded Processors, etc. )
FPGA programming and testing.
Each trainee will practice on his own kit and will have access to Vivado design tools.